[Next] [Previous] [Up] [Top] [Contents] [Back]

3.2.5 Mode Description

3.2.5.3 Pulse Width Measurement Mode, 6

In this mode Ua1 gates the pulse width to be measured. When synchronized with the clock edge after a low to high transition in Ua1, counting begins at the input clock frequency (10 MHz). Similarly, when synchronized with the clock edge after a high to low transition of Ua1, counting is disabled; the value in the counter is stored in the Channel Counter Output Register and the counter is cleared. If Ua2 is held high the counter will count up, and if Ua2 is held low the counter will count down.

Figure 3-8 Pulse Width Measurement

[Next] [Previous] [Up] [Top] [Contents] [Back]