Appendix C Memory Map

Memory Map Group A
Name	Start	End	Size
Group A, Channel 1
Counter	00	03	4 bytes
Enable Index Register	05	05	1 byte
Index Status Register	07	07	1 byte
Direct Input Register	09	09	1 byte
Compare State Register	0B	0B	1 byte
State on IRQ Register	0D	0D	1 byte
IRQ Mask Register	0F	0F	1 byte
Group A, Channel 2
Counter	10	13	4 bytes
Enable Index Register	15	15	1 byte
Index Status Register	17	17	1 byte
Direct Input Register	19	19	1 byte
Compare State Register	1B	1B	1 byte
State on IRQ Register	1D	1D	1 byte
IRQ Mask Register	1F	1F	1 byte
Group A, Channel 3
Counter	20	23	4 bytes
Enable Index Register	25	25	1 byte
Index Status Register	27	27	1 byte
Direct Input Register	29	29	1 byte
Compare State Register	2B	2B	1 byte
State on IRQ Register	2D	2D	1 byte
IRQ Mask Register	2F	2F	1 byte
Group A
Mode Register	33	33	1 byte
Reset Register	37	37	1 byte
BIM Control Register	3B	3B	1 byte
BIM Vector Register	3F	3F	1 byte

Memory Map Group B
Name	Start	End	Size
Group B, Channel 4
Counter	40	43	4 bytes
Enable Index Register	45	45	1 byte
Index Status Register	47	47	1 byte
Direct Input Register	49	49	1 byte
Compare State Register	4B	4B	1 byte
State on IRQ Register	4D	4D	1 byte
IRQ Mask Register	4F	4F	1 byte
Group B, Channel 5
Counter	50	53	4 bytes
Enable Index Register	55	55	1 byte
Index Status Register	57	57	1 byte
Direct Input Register	59	59	1 byte
Compare State Register	5B	5B	1 byte
State on IRQ Register	5D	5D	1 byte
IRQ Mask Register	5F	5F	1 byte
Group B, Channel 6
Counter	60	63	4 bytes
Enable Index Register	65	65	1 byte
Index Status Register	67	67	1 byte
Direct Input Register	69	69	1 byte
Compare State Register	6B	6B	1 byte
State on IRQ Register	6D	6D	1 byte
IRQ Mask Register	6F	6F	1 byte
Group B
Mode Register	73	73	1 byte
Reset Register	77	77	1 byte
BIM Control Register	7B	7B	1 byte
BIM Vector Register	7F	7F	1 byte

Memory Map Group C
Name	Start	End	Size
Group C, Channel 7
Counter	80	83	4 bytes
Enable Index Register	85	85	1 byte
Index Status Register	87	87	1 byte
Direct Input Register	89	89	1 byte
Compare State Register	8B	8B	1 byte
State on IRQ Register	8D	8D	1 byte
IRQ Mask Register	8F	4F	1 byte
Group C, Channel 8
Counter	90	93	4 bytes
Enable Index Register	95	95	1 byte
Index Status Register	97	97	1 byte
Direct Input Register	99	99	1 byte
Compare State Register	9B	9B	1 byte
State on IRQ Register	9D	9D	1 byte
IRQ Mask Register	9F	9F	1 byte
Group C, Channel 9
Counter	A0	A3	4 bytes
Enable Index Register	A5	A5	1 byte
Index Status Register	A7	A7	1 byte
Direct Input Register	A9	A9	1 byte
Compare State Register	AB	AB	1 byte
State on IRQ Register	AD	AD	1 byte
IRQ Mask Register	AF	AF	1 byte
Group C
Mode Register	B3	B3	1 byte
Reset Register	B7	B7	1 byte
BIM Control Register	BB	BB	1 byte
BIM Vector Register	BF	BF	1 byte

Memory Map Group D
Name	Start	End	Size
Group D, Channel 10
Counter	80	83	4 bytes
Enable Index Register	85	85	1 byte
Index Status Register	87	87	1 byte
Direct Input Register	89	89	1 byte
Compare State Register	8B	8B	1 byte
State on IRQ Register	8D	8D	1 byte
IRQ Mask Register	8F	4F	1 byte
Group D, Channel 11
Counter	90	93	4 bytes
Enable Index Register	95	95	1 byte
Index Status Register	97	97	1 byte
Direct Input Register	99	99	1 byte
Compare State Register	9B	9B	1 byte
State on IRQ Register	9D	9D	1 byte
IRQ Mask Register	9F	9F	1 byte
Group D, Channel 12
Counter	A0	A3	4 bytes
Enable Index Register	A5	A5	1 byte
Index Status Register	A7	A7	1 byte
Direct Input Register	A9	A9	1 byte
Compare State Register	AB	AB	1 byte
State on IRQ Register	AD	AD	1 byte
IRQ Mask Register	AF	AF	1 byte
Group D
Mode Register	B3	B3	1 byte
Reset Register	B7	B7	1 byte
BIM Control Register	BB	BB	1 byte
BIM Vector Register	BF	BF	1 byte

CC133 - 12 Channel Incremental Encoder Interface With Isolated Inputs - 30 SEP 1996