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The on-board watchdog resets the processor when it runs out of program control. After a local reset, the watchdog is idle and becomes active after the first watchdog trigger has been given. To prevent the watchdog from resetting the processor, the watchdog must be triggered every 600 ms. To trigger the watchdog, the OP2 output port of the DUART must be driven to a '1' followed by a '0'. This is accomplished by writing $04 to the Set Output Port register ($30001D) followed by writing $04 to the Clear Output Port register ($30001F).
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