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This register is used to specify the mode a group of counters should be operated in.
Group Offset Read/Write |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|
$33 | M2 | M1 | M0 |
The Group Mode Register is used to set the mode of the group's CF32006 master device. The slave device is always in mode 0.
The following modes can be selected for the master device.
Mode | M2 | M1 | M0 | Description |
---|---|---|---|---|
Counter Mode | ||||
0 | 0 | 0 | 0 | 16-bit up/down counter (inhibits direction discriminator). |
Direction Discriminator Mode | ||||
1 | 0 | 0 | 1 | Single count pulse synchronous with Ua1
rising in forward direction and Ua1 falling in backward direction. |
2 | 0 | 1 | 0 | Single count pulse synchronous with Ua2
rising in forward direction and Ua2 falling in backward direction. |
3 | 0 | 1 | 1 | Double count pulse synchronous with Ua1 rising and falling. |
4 | 1 | 0 | 0 | Double count pulse synchronous with Ua2 rising and falling. |
5 | 1 | 0 | 1 | Quadruple count pulse synchronous with all edges. |
Pulse Width Measurement Mode | ||||
6 | 1 | 1 | 0 | Ua1 is the gate signal. Ua2 is high for up counting and low for down counting. Count is synchronous with rising 10 MHz clock. |
Frequency Measurement Mode | ||||
7 | 1 | 1 | 1 | Ua1 is frequency signal to be measured. Ua2 is the gate signal of known time interval. Count is synchronous with rising edge of Ua1. |
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