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| A4 | A3 | register select |
|---|---|---|
| 0 | 0 | BIM control register |
| 0 | 1 | BIM vector register |
| 1 | 0 | Current/Compare State register |
| 1 | 1 | Change State Register |
| A2 | A1 | channel select |
| 0 | 0 | channel 0 |
| 0 | 1 | channel 1 |
| 1 | 0 | channel 2 |
| 1 | 1 | channel 0 |
The next table shows all registers with their respective offsets to the module's base address.
| Offset | Contents |
|---|---|
| 01 | Control Register Channel 0 Level/interrupt bits |
| 03 | Control Register Channel 1 Level/interrupt bits |
| 05 | Control Register Channel 2 Level/interrupt bits |
| 07 | Control Register Channel 3 Level/interrupt bits |
| 09 | Vector Register Channel 0 |
| 0B | Vector Register Channel 1 |
| 0D | Vector Register Channel 2 |
| 0F | Vector Register Channel 3 |
| 11 | Read Current State Register Channel 0 Write Compare State Register |
| 13 | Read Current State Register Channel 1 Write Compare State Register |
| 15 | Read Current State Register Channel 2 Write Compare State Register |
| 17 | Read Current State Register Channel 3 Write Compare State Register |
| 19 | Read Change State Register Channel 0 |
| 1B | Read Change State Register Channel 1 |
| 1D | Read Change State Register Channel 2 |
| 1F | Read Change State Register Channel 3 |
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