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Figure 5-5 Compare State Register
When the digital inputs differ from the values of CDI and CIND written in this register, an interrupt can be generated and a sample of the digital inputs is made in the 'State On IRQ Register'
After an interrupt is generated due to a change of state, a write access to the Compare State Register should be performed before another interrupt will be detected in the specific group. The write access to the Compare State Register will clear the interrupt request to the BIM. If the IRE bit in the Group BIM Control Register is set before the Compare State Register is written, another interrupt will be generated.
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