5.7 DUART Serial Interface

The 16 registers of the DUART are located at addresses $300001 through $30001F. The operation of the DUART is programmed by writing control words into the appropriate registers. Operational feedback is provided via status registers which can be read by the MPU. The clock frequency of the DUART is 3.6864 MHz. Appendix F shows a detailed register map of the DUART.

Port A is used as an RS-232 interface and supports the signals TxD and RxD on a 9-pin male D-connector at the front panel.
Port B is available via the P2 connector with the TxD, RxD, RTS and CTS signals at TTL level.

The next table shows the usage of the I/O lines of the DUART.

DUART I/O Lines
Pin Name	Signal Name	Direction	Function
IP0	IP0~	input	ERR from T-CAN Channel 0
IP1	CTSB~	input	Clear to Send Channel B
IP2	IP2~	input	Data Out I2C Channel 0
IP3	IP3~	input	Data Out I2C Channel 1
IP4	IP4~	input	ERR from T-CAN Channel 1
IP5	IP5~	input	EEPROM Data
OP0	OP0~	output	Clock I2C Channel 0
OP1	RTSB~	output	Request to Send Channel B
OP2	WDTRIG~	output	Watchdog Trigger
OP3	OP3~	output	Data In I2C Channel 0
OP4	OP4~	output	Clock I2C Channel 1
OP5	OP5~	output	EEPROM Data
OP6	OP6~	output	EEPROM Clock
OP7	OP7~	output	Data In I2C Channel 1

The DUART input lines can generate a change-of-state interrupt by programming the Auxiliary Control register.

The Output Ports can be programmed to be high ('1') or low ('0'). After Reset, the OPx lines are all '1'. The DUART output lines can be individually programmed by writing to the 'Set Output Port Bits' register or 'Clear Output Port Bits' register. The data written to these registers determine which Output Line(s) will be affected. An output line will be affected when the corresponding data bit is '1'.

CC175 - Dual Channel Intelligent CAN Interface for VMEbus - 30 SEP 1996

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