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[Previous] [Up] [Top] [Contents] [Back]5.2.1 Channel Registers
This a read only register.
Channel Offset Read Only |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|
$0D | SDI | SIND |
The SDI and SIND bits reflect the state of the digital inputs at the moment they differ from the Compare State Register and an interrupt request is made to the Bus Interrupter Module.
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