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5.2 Device Group Registers

5.2.6 Group BIM Vector Register

This register contains the interrupt vector.

Group BIM Vector Register
Group Offset
Read/Write		 7 6 5 4 3 2 1 0
$3F V7 V6 V5 V4 V3 V2 V1 V0

This byte is presented on the data bus during an interrupt acknowledge cycle. After SYSRESET this register is set to $0F, the MC680xx un-initialized vector.

CC433 - 12 Channel Incremental Encoder Interface with Isolated Inputs and Cable Fault Detection - 22 MAY 1997
Copyright © 1997 Compcontrol, Inc.

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