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[Previous] [Up] [Top] [Contents] [Back]5.11 Timer Interrupts
A multi-function programmable 16-bit counter/timer is provided by the SCN68681 DUART. The counter/timer (C/T) operating modes and clock sources are programmed in the ACR[6:4] field.
In the counter mode, the C/T counts down the number of pulses loaded into CTUR and CTLR by the MPU. Upon reaching terminal count 000016, the counter ready status bit (ISR[3]) is set.
In the timer mode, the C/T generates a square wave with a period of twice the value (in clock periods) of the CTUR and CTLR. In this mode the C/T runs continuously. The counter ready status bit (ISR[3]) is set once each cycle of the square wave.
The counter ready status bit ISR[3] bit can be read and cleared. Interrupts will be generated when the counter ready status bit ISR[3] is a '1' and the interrupt mask register bit IMR[3] is a '1'.
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