5.2.1.2 Enable Index Register

This registers is used to set whether an index pulse will reset the counter and at which level this index pulse will be active.

Enable Index Register
Channel Offset Read/Write	7	6	5	4	3	2	1	0
$05							LVLIND	EIND

EIND: When EIND=1, an index pulse will reset the counter.
When EIND=0, the index pulse is masked and will not reset the counter.
LVLIND: When LVLIND=0, a '1-0-1' pulse on the index input will clear the counter, if enabled using EIND.
When LVLIND=1, a '0-1-0' pulse on the index input will clear the counter, if enabled using EIND.

After a SYSRESET these bits are cleared.

Note: The state of the EIND bit does not affect the interrupt capability of the index input.

CC433 - 12 Channel Incremental Encoder Interface with Isolated Inputs and Cable Fault Detection - 22 MAY 1997